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The Velocity Room : Updated on July 21, 2026
If you look closely at the history of enterprise hardware, you will notice a highly predictable, cyclical pattern. Every time a disruptive new technology emerges, highly specialized, proprietary accelerators flood the market to run those workloads faster and cheaper than general-purpose silicon. But eventually, the cycle turns: standard systems catch up, the software stack matures, and the workload gets commoditized back onto standard CPUs.
To help enterprise architects understand where we are in this compute cycle, The Velocity Room welcomed back William Fowler. As an Intel AI Solutions Architect, William helps global organizations build on-premises systems designed to withstand the rapid shifts in hardware standards.
When William sat down with TVR Board Member Richard Piasentin, they broke down the historic shift occurring in the CPU market: Intel and AMD have called a truce to standardize the x86 instruction set, and this newly unified platform is aiming directly at the AI market.
Here are the 3 most catching moments from William's perspective on the x86 consortium and the commoditization of AI.
1. The x86 Consortium: Competing on Silicon, Standardizing the Instruction Set
"Intel and AMD have started what we call the x86 consortium... We're working to kind of create standard instruction set extensions... The implementation on silicon will be different, but the framework of the instruction set will be portable."
2. The Cyclical Race to Commoditization
"If you trace kind of the nature of technology, you have kind of this race to commoditization... When a new technology comes out, you'll often see these specialized accelerators pop up... over time you'll see more and more of the actual inferencing work happening on CPUs, just because it's not as complex to deploy, it's not as expensive to deploy, and doesn't need as much power."
3. The Modern GPU is Today's FPGA
"Richard: 'Why do you have an FPGA? Well, because you're not 100% sure exactly how you're going to do something, so you do things in an FPGA. As soon as you lock and load it, you slam it into an ASIC... We are in the FPGA side of the GPU compute world... functions will be disaggregated to drive cost out of the system.'"
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